All electrical devices are required a power source for operation. Among the various types of power supplies, switching power converters are widely used because they have better efficiency and provide suitable output modulation. However, when a switching power converter is under light load conditions, its efficiency will reduce due to switching loss. To improve the efficiency at light load, a burst mode strategy is applied to reduce the average switching frequency and save the switching loss. FIG. 1 is a perspective diagram of a conventional current mode flyback converter 10, in which a rectifier 12 converts an AC voltage Vac into a DC input voltage Vin, a controller 16 detects the current flowing through a power switch 18 to obtain a current sense signal Vcs, and provides a control signal VGATE according to the current sense signal Vcs and a feedback signal Vcomp to switch the power switch 18, so as to have a transformer 14 to convert the input voltage Vin into an output voltage Vo, and an opto-coupler 20 generates the feedback signal Vcomp according to the output voltage Vo to feed back to the controller 16. The feedback signal Vcomp is a function of the output voltage Vo.
FIG. 2 is a perspective diagram of a portion of the controller 16 shown in FIG. 1, in which a burst circuit 22 has a hysteresis comparator 24 to generate a mask signal Smask according to the feedback signal Vcomp and a preset voltage Burst_level to mask a clock CLK by an AND gate 26, and a pulse width modulation (PWM) circuit 28 has a comparator 30 to compare the current sense signal Vcs with the feedback signal Vcomp to generate a comparison signal Sc, and a flip-flop 32 to generate the control signal VGATE according to the output of the AND gate 26 and the comparison signal Sc. FIG. 3 is waveform diagram of the flyback converter 10 shown in FIG. 1, in which waveform 34 represents the load, waveform 36 represents the feedback signal Vcomp, and waveform 38 represents the control signal VGATE. Referring to FIGS. 2 and 3, in normal operation, i.e. the load is heavy, as between time t1 and time t2, the feedback signal Vcomp is greater than voltages VBURH and VBURL, as shown by the waveform 36, so that the clock CLK is not masked, and in consequence the control signal VGATE is continuously provided to switch the power switch 18, as shown by the waveform 38. The voltages VBURH and VBURL are hysteresis boundaries generated by the hysteresis comparator 24 according to the voltage Burst_level. At time t2, the load turns from heavy to light so that the feedback signal Vcomp begins to drop. When the feedback signal Vcomp is lower than the voltage VBURL, as shown at time t3, the flyback converter 10 enters a burst mode, in which the mask signal Smask will switch to logic “0” when the feedback signal Vcomp is lower than the voltage VBURL, thus masking the clock CLK, and the mask signal Smask will not switch to logic “1” until the feedback signal Vcomp is higher than the voltages VBURH, as shown at time t4. The clock CLK is released when the mask signal Smask switches to logic “1”. Hence, a burst cycle is generated to regulate the output voltage Vo and supply sufficient output power. One burst cycle is shown in FIG. 3 as between time t3 and time t5.
FIG. 4 is a perspective diagram of the current sense signals Vcs under different input voltages Vin, in which waveform 40 represents the feedback signal Vcomp, waveform 42 represents the current sense signal Vcs corresponding to a high input voltage Vin, and waveform 44 represents the current sense signal Vcs corresponding to a low input voltage Vin. FIG. 5 is a perspective diagram of burst mode entry points of load under different input voltages Vin, in which waveform 46 represents the voltage VBRUH, waveform 48 represents the voltage VBRUL, waveform 50 represents the feedback signal Vcomp corresponding to a high input voltage Vin, and waveform 52 represents the feedback signal Vcomp corresponding to a low input voltage Vin following different output power conditions. Referring to FIG. 4 in conjunction with FIG. 1, if the input voltage Vin is a higher one, the current sense signal Vcs increases at a higher speed, as shown by the waveform 42; if the input voltage Vin is a lower one, the current sense signal Vcs increases at a lower speed, as shown by the waveform 44. After the current sense signal Vcs reaches the level of the feedback signal Vcomp, a propagation delay time Tp due to the delay in signal propagation must elapse before the power switch 18 is turned off. In addition, since the current sense signal Vcs increases at a higher speed under a higher input voltage Vin, the current sense signal Vcs corresponding to the higher input voltage Vin has a higher peak than the current sense signal Vcs corresponding to the lower input voltage Vin, if the propagation delay TP is a constant duration. In other words, the peak of the current I1 in the primary side of the transformer 14 is higher under the higher input voltage Vin than under the lower input voltage Vin following the same Vcomp level. In the burst mode, the current I1 has a minimum pulse:I1min=(Burst_level/Rcs)+(Vin/Lm)×Tp,  [EQ-1]where Lm is magnetizing inductance. After the flyback converter 10 enters the burst mode, the frequency of each burst cycle may fall within an audible noise range of 100 Hz to 20 kHz, such that the higher the current I1 is, the louder the audible noise will be. Moreover, the feedback signal Vcomp varies with the peak value of the current I1. Referring to FIG. 5, if the input voltage Vin is higher, the peak value of the current I1 is higher and in consequence the feedback signal Vcomp is lower, as shown by the waveform 50. Hence, the flyback converter 10 enters the burst mode earlier. On the contrary, if the input voltage Vin is lower, the peak value of the current I1 is lower so that the feedback signal Vcomp is higher, as shown by the waveform 52. As a result, the entry point B of the burst mode under the lower input voltage Vin comes later than the entry point A of the burst mode under the higher input voltage Vin.
Therefore, it is desired an apparatus and method to compensate the propagation delay and thus compensate for the entry point of the burst mode.